The present invention relates to a MOS type solid state image sensor and, more particularly, a solid state image sensor constituted in such a manner that the picture quality of reproduced pictures can be improved.
FIG. 1 is a diagram showing an example of the circuit arrangement of a general solid state image sensing device known as amplification type MOS sensor.
Referring to FIG. 1, the solid state image sensing device shown is constituted in such a manner that unit cells which respectively consist of photodiodes 2.sup.11, 2.sub.12, 2.sub.13, 2.sub.21, 2.sub.22, 2.sub.23, 2.sub.31, 2.sub.32 and 2.sub.33, amplifying transistors 4.sub.11, 4.sub.12, 4.sub.21, 4.sub.22, 4.sub.23, 4.sub.31, 4.sub.32 and 4.sub.33 for reading the signals from the photodiodes 2.sub.11, 2.sub.12, . . . , 2.sub.32 and 2.sub.33, vertical selection transistors 6.sub.11, 6.sub.12, 6.sub.13, 6.sub.21, 6.sub.22, 6.sub.23, 6.sub.31, 6.sub.32 and 6.sub.33 for selecting the lines for reading the signals, and reset transistors 8.sub.11, 8.sub.12, 8.sub.13, 8.sub.21, 8.sub.22, 8.sub.23, 8.sub.31, 8.sub.32 and 8.sub.33 for resetting the signal charging are disposed in a 3.times.3 two-dimensional state. In the case indicated above, 3.times.3 unit cells are shown, but, in actuality, a larger number of unit cells are disposed.
Horizontal address lines 12.sub.1, 12.sub.2 and 12.sub.3 disposed extending in the horizontal direction from a vertical shift register 10 are connected to the gates of the vertical selection transistors 6.sub.11, 6.sub.12, . . . , 6.sub.32 and 6.sub.33, respectively, whereby the line for reading out the signal out is determined. Further, reset lines 14.sub.1, 14.sub.2 and 14.sub.3 are connected to the gates of the reset transistors 8.sub.12, 8.sub.22, . . . , 8.sub.32 and 8.sub.33, respectively.
The sources of the amplifying transistors 4.sub.11, 4.sub.12, . . . , 4.sub.32 and 4.sub.33 are connected to vertical signal lines 16.sub.1, 16.sub.2 and 16.sub.3, respectively, and, to one-side ends of the respective signal lines, load transistors 18.sub.1, 18.sub.2 and 18.sub.3 are connected. The other ends of the vertical signal lines 16.sub.1, 16.sub.2 and 16.sub.3 are connected to a horizontal signal line 24 through horizontal selection transistors 22.sub.1, 22.sub.2 and 22.sub.3 which are each selected by a selection pulse fed from a horizontal shift register 20.
The circuit which is constituted as described above operates as follows:
An address pulse which makes the horizontal address line 12.sub.1, 12.sub.2 or 12.sub.3 high in level is applied to it from the vertical shift register 10, as a result of which only the vertical selection transistors on the particulars line are turned on. Then, by the respective amplifying transistor on the thus selected line and the associated load transistor, a source follower circuit is constituted, and thus, a voltage approximately equal to the gate voltage of the amplifying transistor, that is, the voltage of the photodiode appears on the vertical signal line.
Next, from the horizontal shift register 20, horizontal selection pulses are successively applied to the horizontal selection transistors 22.sub.1, 22.sub.2 and 22.sub.3, and thus, from the horizontal signal line 24, signals corresponding to one line are successively taken out from the horizontal signal line 24. This operation is continuously carried out for the succeeding lines one after another, whereby all the signals in a two-dimensional state can be read out.
However, in the case of this type of device, there is the following drawback.
That is, all the transistors, not to speak of the amplifying transistors, disposed in the respective cells are reduced in dimensions as the structural minuteness of the cells is enhanced. Further, as the structural minuteness of the transistors is thus enhanced, the wells concentration in which the transistors are formed cannot but be increased. This is because, if otherwise, this (the enhancement in the wells concentration) would result in making further serious the drawbacks, such as the so-called short-channel effect and the so-called narrow-channel effect, caused through the enhancement of the structural minuteness.
On the other hand, it has been found that, if, in the respective photodiode which constitute a photo-electric conversion portion, the well concentration is increased, as in the case of the signal scanning portion, as the result of such enhancement in structural minuteness of the cells, then the following inconveniences will result:
FIG. 2 is a characteristic diagram illustrating the relationship between the well concentration and the junction leakage current of such a photo diode. From FIG. 2, it is understood that, in the case of the photodiode, as the well concentration is increased, the junction leakage current thereof increases. If the junction leakage current thus increases, then there is caused a so-called dark state in which the amount of signal in the device is scanty, which results in the generation of noises; and thus, the picture-quality of the reproduced pictures is conspicuously deteriorated.
That is, in the case of conventional MOS sensor, the transistors constituting the signal scanning circuit must also be made into minute structure when the picture elements are made structurally further minute. Further, in order to make such minute-structure transistors operate without being affected by the two-dimensional effects, the well concentration in which the transistors are formed must be enhanced.
In the case of the photodiode which constitute a photoelectric conversion portion, if the well concentration is enhanced, then the junction leakage current increases, as mentioned above, which results in the generation of noises on the reproducing screen, thus greatly deteriorating the picture quality of the reproduced picture. This has been a drawback.